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precision micropower, low dropout voltage references ref19x series rev. i information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features initial accuracy: 2 mv maximum temperature coefficient: 5 ppm/c maximum low supply current: 45 a maximum sleep mode: 15 a maximum low dropout voltage load regulation: 4 ppm/ma line regulation: 4 ppm/v high output current: 30 ma short-circuit protection applications portable instruments adcs and dacs smart sensors solar-powered applications loop current-powered instruments general description the ref19x series precision band gap voltage references use a patented temperature drift curvature correction circuit and laser trimming of highly stable, thin-film resistors to achieve a very low temperature coefficient and high initial accuracy. the ref19x series is made up of micropower, low dropout voltage (ldv) devices, providin g stable output voltage from supplies as low as 100 mv above the output voltage and consuming less than 45 a of supply current. in sleep mode, which is enabled by applying a low ttl or cmos level to the sleep pin, the output is turned off, and supply current is further reduced to less than 15 a. the ref19x series references are specified over the extended industrial temperature range (?40c to +85c), with typical performance specifications over ?40c to +125c for applications such as automotive. all electrical grades are available in an 8-lead soic_n package; the pdip and tssop packages are available only in the lowest electrical grade. products are also available in die form. test pins test pin 1 and test pin 5 are reserved for in-package zener zap. to achieve the highest level of accuracy at the output, the zener zapping technique is used to trim the output voltage. since each unit may require a different amount of adjustment, the resistance value at the test pins varies widely from pin to pin and from part to part. the user should leave pin 1 and pin 5 unconnected. ref19x series top view (not to scale) tp 1 v s 2 sleep 3 gnd 4 nc nc output tp 8 7 6 5 notes 1. nc = no connect. 2. tp pins are factory test points, no user connection. 0 0371-001 figure 1. 8-lead soic_n and tssop pin configuration (s suffix and ru suffix) ref19x series top view (not to scale) tp 1 v s 2 s leep 3 gnd 4 nc nc output tp 8 7 6 5 notes 1. nc = no connect. 2. tp pins are factory test points, no user connection. 00371-002 figure 2. 8-lead pdip pin configuration (p suffix) table 1. nominal output voltage part number nominal output voltage (v) ref191 2.048 ref192 2.50 ref193 3.00 ref194 4.50 ref195 5.00 ref196 3.30 ref198 4.096
ref19x series rev. i | page 2 of 28 table of contents specifications..................................................................................... 3 electrical characteristicsref191 @ t a = 25c .................... 3 electrical characteristicsref191 @ ?40c t a +85c .. 4 electrical characteristicsref191 @ ?40c t a +125c. 5 electrical characteristicsref192 @ t a = 25c .................... 5 electrical characteristicsref192 @ ?40c t a +85c.. 6 electrical characteristicsref192 @ ?40c t a +125c 6 electrical characteristicsref193 @ t a = 25c .................... 7 electrical characteristicsref193 @ ?40c t a +85c.. 7 electrical characteristicsref193 @ t a ?40c +125c 8 electrical characteristicsref194 @ t a = 25c..................... 8 electrical characteristicsref194 @ ?40c t a +85c.. 9 electrical characteristicsref194 @ ?40c t a +125c 9 electrical characteristicsref195 @ t a = 25c .................. 10 electrical characteristicsref195 @ ?40c t a +85c 10 electrical characteristicsref195 @ ?40c t a +125c ....................................................................................................... 11 electrical characteristicsref196 @ t a = 25c .................. 11 electrical characteristicsref196 @ ?40c t a +85c 12 electrical characteristicsref196 @ ?40c t a +125c ....................................................................................................... 12 electrical characteristicsref198 @ t a = 25c .................. 13 electrical characteristicsref198 @ ?40c t a +85c 13 electrical characteristicsref198 @ ?40c t a + 125c ....................................................................................................... 14 wafer test limits........................................................................ 14 absolute maximum ratings ......................................................... 15 thermal resistance .................................................................... 15 esd caution................................................................................ 15 typical performance characteristics ........................................... 16 applications..................................................................................... 19 output short-circuit behavior ................................................ 19 device power dissipation considerations.............................. 19 output voltage bypassing ......................................................... 19 sleep mode operation............................................................... 19 basic voltage reference connections ..................................... 19 membrane switch-controlled power supply ......................... 19 current-boosted references with current limiting............. 20 negative precision reference without precision resistors ... 20 stacking reference ics for arbitrary outputs ....................... 21 precision current source .......................................................... 21 switched output 5 v/3.3 v reference..................................... 22 kelvin connections.................................................................... 22 fail-safe 5 v reference.............................................................. 23 low power, strain gage circuit ............................................... 24 outline dimensions ....................................................................... 25 ordering guide .......................................................................... 26 revision history 9/06rev. h to rev. i updated format..................................................................universal changes to table 25 ....................................................................... 15 changes to figure 6........................................................................ 16 changes to figure 10, figure 12, figure 14, and figure 16....... 17 changes to figure 18...................................................................... 18 changes to figure 20...................................................................... 19 changes to figure 23...................................................................... 20 changes to figure 25...................................................................... 21 updated outline dimensions ....................................................... 25 changes to ordering guide .......................................................... 26 6/05rev. g to rev. h updated format..................................................................universal changes to caption in figure 7 .................................................... 16 updated outline dimensions ....................................................... 25 changes to ordering guide .......................................................... 26 7/04rev. f to rev. g changes to ordering guide .............................................................4 3/04rev. e to rev. f updated absolute maximum rating ..............................................4 changes to ordering guide .......................................................... 14 updated outline dimensions....................................................... 24 1/03rev. d to rev. e changes to figure 3 and figure 4................................................. 15 changes to output short circuit behavior................................. 17 changes to figure 20...................................................................... 17 changes to figure 24...................................................................... 19 updated outline dimensions....................................................... 23 1/96revision 0: initial version
ref19x series rev. i | page 3 of 28 specifications electrical characteristicsref191 @ t a = 25c @ v s = 3.3 v, t a = 25c, unless otherwise noted. table 2. parameter mnemonic condition min typ max unit initial accuracy 1 e grade v o i out = 0 ma 2.046 2.048 2.050 v f grade 2.043 2.053 v g grade 2.038 2.058 v line regulation 2 e grade v o /v in 3.0 v v s 15 v, i out = 0 ma 2 4 ppm/v f and g grades 4 8 ppm/v load regulation 2 e grade v o /v load v s = 5.0 v, 0 ma i out 30 ma 4 10 ppm/ma f and g grades 6 15 ppm/ma dropout voltage v s ? v o v s = 3.15 v, i load = 2 ma 0.95 v v s = 3.3 v, i load = 10 ma 1.25 v v s = 3.6 v, i load = 30 ma 1.55 v long-term stability 3 dv o 1000 hours @ 125c 1.2 mv noise voltage e n 0.1 hz to 10 hz 20 v p-p 1 initial accuracy includes temperature hysteresis effect. 2 line and load regulation specificatio ns include the effect of self-heating. 3 long-term stability specification is nonc umulative. the drift in subsequent 1000-hour periods is significantly lower than in t he first 1000-hour period.
ref19x series rev. i | page 4 of 28 electrical characteristicsref191 @ ?40c t a +85c @ v s = 3.3 v, ?40c t a +85c, unless otherwise noted. table 3. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 e grade tcv o /c i out = 0 ma 2 5 ppm/c f grade 5 10 ppm/c g grade 3 10 25 ppm/c line regulation 4 e grade v o /v in 3.0 v v s 15 v, i out = 0 ma 5 10 ppm/v f and g grades 10 20 ppm/v load regulation 4 e grade v o /v load v s = 5.0 v, 0 ma i out 25c 5 15 ppm/ma f and g grades 10 20 ppm/ma dropout voltage v s ? v o v s = 3.15 v, i load = 2 ma 0.95 v v s = 3.3 v, i load = 10 ma 1.25 v v s = 3.6 v, i load = 25 ma 1.55 v sleep pin logic high input voltage v h 2.4 v logic high input current i h ?8 a logic low input voltage v l 0.8 v logic low input current i l ?8 a supply current no load 45 a sleep mode no load 15 a 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating.
ref19x series rev. i | page 5 of 28 electrical characteristicsref191 @ ? 40c t a + 125c @ v s = 3.3 v, ?40c t a +125c, unless otherwise noted. table 4. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 e grade tcv o /c i out = 0 ma 2 ppm/c f grade 5 ppm/c g grade 3 10 ppm/c line regulation 4 e grade v o /v in 3.0 v v s 15 v, i out = 0 ma 10 ppm/v f and g grades 20 ppm/v load regulation 4 e grade v o /v load v s = 5.0 v, 0 ma i out 20 ma 10 ppm/ma f and g grades 20 ppm/ma dropout voltage v s ? v o v s = 3.3 v, i load = 10 ma 1.25 v v s = 3.6 v, i load = 20 ma 1.55 v 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating. electrical characteristicsref192 @ t a = 25c @ v s = 3.3 v, t a = 25c, unless otherwise noted. table 5. parameter mnemonic condition min typ max unit initial accuracy 1 e grade v o i out = 0 ma 2.498 2.500 2.502 v f grade 2.495 2.505 v g grade 2.490 2.510 v line regulation 2 e grade v o /v in 3.0 v v s 15 v, i out = 0 ma 2 4 ppm/v f and g grades 4 8 ppm/v load regulation 2 e grade v o /v load v s = 5.0 v, 0 ma i out 30 ma 4 10 ppm/ma f and g grades 6 15 ppm/ma dropout voltage v s ? v o v s = 3.5 v, i load = 10 ma 1.00 v v s = 3.9 v, i load = 30 ma 1.40 v long-term stability 3 dv o 1000 hours @ 125c 1.2 mv noise voltage e n 0.1 hz to 10 hz 25 v p-p 1 initial accuracy includes temperature hysteresis effect. 2 line and load regulation specificatio ns include the effect of self-heating. 3 long-term stability specification is nonc umulative. the drift in subsequent 1000-hour periods is significantly lower than in t he first 1000-hour period.
ref19x series rev. i | page 6 of 28 electrical characteristicsref192 @ ? 40c t a +85c @ v s = 3.3 v, ?40c t a +85c, unless otherwise noted. table 6. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 e grade tcv o /c i out = 0 ma 2 5 ppm/c f grade 5 10 ppm/c g grade 3 10 25 ppm/c line regulation 4 e grade v o /v in 3.0 v v s 15 v, i out = 0 ma 5 10 ppm/v f and g grades 10 20 ppm/v load regulation 4 e grade v o /v load v s = 5.0 v, 0 ma i out 25 ma 5 15 ppm/ma f and g grades 10 20 ppm/ma dropout voltage v s ? v o v s = 3.5 v, i load = 10 ma 1.00 v v s = 4.0 v, i load = 25 ma 1.50 v sleep pin logic high input voltage v h 2.4 v logic high input current i h ?8 a logic low input voltage v l 0.8 v logic low input current i l ?8 a supply current no load 45 a sleep mode no load 15 a 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specifications include the effect of self-heating. electrical characteristicsref192 @ ? 40c t a +125c @ v s = 3.3 v, ?40c t a +125c, unless otherwise noted. table 7. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 e grade tcv o /c i out = 0 ma 2 ppm/c f grade 5 ppm/c g grade 3 10 ppm/c line regulation 4 e grade v o /v in 3.0 v v s 15 v, i out = 0 ma 10 ppm/v f and g grades 20 ppm/v load regulation 4 e grade v o /v load v s = 5.0 v, 0 ma i out 20 ma 10 ppm/ma f and g grades 20 ppm/ma dropout voltage v s ? v o v s = 3.5 v, i load = 10 ma 1.00 v v s = 4.0 v, i load = 20 ma 1.50 v 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating.
ref19x series rev. i | page 7 of 28 electrical characteristicsref193 @ t a = 25c @ v s = 3.3 v, t a = 25c, unless otherwise noted. table 8. parameter mnemonic condition min typ max unit initial accuracy 1 g grade v o i out = 0 ma 2.990 3.0 3.010 v line regulation 2 g grade v o /v in 3.3 v, v s 15 v, i out = 0 ma 4 8 ppm/v load regulation 2 g grade v o /v load v s = 5.0 v, 0 ma i out 30 ma 6 15 ppm/ma dropout voltage v s ? v o v s = 3.8 v, i load = 10 ma 0.80 v v s = 4.0 v, i load = 30 ma 1.00 v long-term stability 3 dv o 1000 hours @ 125c 1.2 mv noise voltage e n 0.1 hz to 10 hz 30 v p-p 1 initial accuracy includes temperature hysteresis effect. 2 line and load regulation specificatio ns include the effect of self-heating. 3 long-term stability specification is nonc umulative. the drift in subsequent 1000-hour periods is significantly lower than in t he first 1000-hour period. electrical characteristicsref193 @ ? 40c t a +85c @ v s = 3.3 v, ?40c t a +85c, unless otherwise noted. table 9. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 g grade 3 tcv o /c i out = 0 ma 10 25 ppm/c line regulation 4 g grade v o /v in 3.3 v v s 15 v, i out = 0 ma 10 20 ppm/v load regulation 4 g grade v o /v load v s = 5.0 v, 0 ma i out 25 ma 10 20 ppm/ma dropout voltage v s ? v o v s = 3.8 v, i load = 10 ma 0.80 v v s = 4.1 v, i load = 30 ma 1.10 v sleep pin logic high input voltage v h 2.4 v logic high input current i h ?8 a logic low input voltage v l 0.8 v logic low input current i l ?8 a supply current no load 45 a sleep mode no load 15 a 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating.
ref19x series rev. i | page 8 of 28 electrical characteristicsref193 @ t a ? 40c +125c @ v s = 3.3 v, C40c t a +125c, unless otherwise noted. table 10. parameter mnemonic condition min typ max unit temperature coefficient 1 ,2 g grade 3 tcv o /c i out = 0 ma 10 ppm/c line regulation 4 g grade v o /v in 3.3 v v s 15 v, i out = 0 ma 20 ppm/v load regulation 4 g grade v o /v load v s = 5.0 v, 0 ma i out 20 ma 10 ppm/ma dropout voltage v s ? v o v s = 3.8 v, i load = 10 ma 0.80 v v s = 4.1 v, i load = 20 ma 1.10 v 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating. electrical characteristicsref194 @ t a = 25c @ v s = 5.0 v, t a = 25c, unless otherwise noted. table 11. parameter mnemonic condition min typ max unit initial accuracy 1 e grade v o i out = 0 ma 4.498 4.5 4.502 v f grade 4.495 4.505 v g grade 4.490 4.510 v line regulation 2 e grade ?v o /?v in 4.75 v v s 15 v, i out = 0 ma 2 4 ppm/v f and g grades 4 8 ppm/v load regulation 2 e grade ?v o /?v load v s = 5.8 v, 0 ma i out 30 ma 2 4 ppm/ma f and g grades 4 8 ppm/ma dropout voltage v s ? v o v s = 5.00 v, i load = 10 ma 0.50 v v s = 5.8 v, i load = 30 ma 1.30 v long-term stability 3 dv o 1000 hours @ 125c 2 mv noise voltage e n 0.1 hz to 10 hz 45 v p-p 1 initial accuracy includes temperature hysteresis effect. 2 line and load regulation specificatio ns include the effect of self-heating. 3 long-term stability specification is nonc umulative. the drift in subsequent 1000-hour periods is significantly lower than in t he first 1000-hour period.
ref19x series rev. i | page 9 of 28 electrical characteristicsref194 @ ? 40c t a +85c @ v s = 5.0 v, ?40c t a +85c, unless otherwise noted. table 12. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 e grade tcv o /c i out = 0 ma 2 5 ppm/c f grade 5 10 ppm/c g grade 3 10 25 ppm/c line regulation 4 e grade ?v o /?v in 4.75 v v s 15 v, i out = 0 ma 5 10 ppm/v f and g grades 10 20 ppm/v load regulation 4 e grade ?v o /?v load v s = 5.80 v, 0 ma i out 25 ma 5 15 ppm/ma f and g grades 10 20 ppm/ma dropout voltage v s ? v o v s = 5.00 v, i load = 10 ma 0.5 v v s = 5.80 v, i load = 25 ma 1.30 v sleep pin logic high input voltage v h 2.4 v logic high input current i h ?8 a logic low input voltage v l 0.8 v logic low input current i l ?8 a supply current no load 45 a sleep mode no load 15 a 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating. electrical characteristicsref194 @ ? 40c t a +125c @ v s = 5.0 v, ?40c t a +125c, unless otherwise noted. table 13. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 e grade tcv o /c i out = 0 ma 2 ppm/c f grade 5 ppm/c g grade 3 10 ppm/c line regulation 4 e grade v o /v in 4.75 v v s 15 v, i out = 0 ma 5 ppm/v f and g grades 10 ppm/v load regulation e grade v o /v load v s = 5.80 v, 0 ma i out 20 ma 5 ppm/ma f and g grades 10 ppm/ma dropout voltage v s ? v o v s = 5.10 v, i load = 10 ma 0.60 v v s = 5.95 v, i load = 20 ma 1.45 v 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating.
ref19x series rev. i | page 10 of 28 electrical characteristicsref195 @ t a = 25c @ v s = 5.10 v, t a = 25c, unless otherwise noted. table 14. parameter mnemonic condition min typ max unit initial accuracy 1 e grade v o i out = 0 ma 4.998 5.0 5.002 v f grade 4.995 5.005 v g grade 4.990 5.010 v line regulation 2 e grade v o /v in 5.10 v v s 15 v, i out = 0 ma 2 4 ppm/v f and g grades 4 8 ppm/v load regulation 2 e grade v o /v load v s = 6.30 v, 0 ma i out 30 ma 2 4 ppm/ma f and g grades 4 8 ppm/ma dropout voltage v s ? v o v s = 5.50 v, i load = 10 ma 0.50 v v s = 6.30 v, i load = 30 ma 1.30 v long-term stability 3 dv o 1000 hours @ 125c 1.2 mv noise voltage e n 0.1 hz to 10 hz 50 v p-p 1 initial accuracy includes temperature hysteresis effect. 2 line and load regulation specificatio ns include the effect of self-heating. 3 long-term stability specification is nonc umulative. the drift in subsequent 1000-hour periods is significantly lower than in t he first 1000-hour period. electrical characteristicsref195 @ ? 40c t a +85c @ v s = 5.15 v, ?40c t a +85c, unless otherwise noted. table 15. parameter mnemonic condition min typ max unit temperature coefficient 1,2 e grade tcv o /c i out = 0 ma 2 5 ppm/c f grade 5 10 ppm/c g grade 3 10 25 ppm/c line regulation 4 e grade v o /v in 5.15 v v s 15 v, i out = 0 ma 5 10 ppm/v f and g grades 10 20 ppm/v load regulation 4 e grade v o /v load v s = 6.30 v, 0 ma i out 25 ma 5 10 ppm/ma f and g grades 10 20 ppm/ma dropout voltage v s ? v o v s = 5.50 v, i load = 10 ma 0.50 v v s = 6.30 v, i load = 25 ma 1.30 v sleep pin logic high input voltage v h 2.4 v logic high input current i h ?8 a logic low input voltage v l 0.8 v logic low input current i l ?8 a supply current no load 45 a sleep mode no load 15 a 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating.
ref19x series rev. i | page 11 of 28 electrical characteristicsref195 @ ? 40c t a +125c @ v s = 5.20 v, ?40c t a +125c, unless otherwise noted. table 16. parameter mnemonic condition min typ max unit temperature coefficient 1, 2 e grade tcv o /c i out = 0 ma 2 ppm/c f grade 5 ppm/c g grade 3 10 ppm/c line regulation 4 e grade v o /v in 5.20 v v s 15 v, i out = 0 ma 5 ppm/v f and g grades 10 ppm/v load regulation 4 e grade v o /v load v s = 6.45 v, 0 ma i out 20 ma 5 ppm/ma f and g grades 10 ppm/ma dropout voltage v s ? v o v s = 5.60 v, i load = 10 ma 0.60 v v s = 6.45 v, i load = 20 ma 1.45 v 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating. electrical characteristicsref196 @ t a = 25c @ v s = 3.5 v, t a = 25c, unless otherwise noted. table 17. parameter mnemonic condition min typ max unit initial accuracy 1 g grade v o i out = 0 ma 3.290 3.3 3.310 v line regulation 2 g grade v o /v in 3.50 v v s 15 v, i out = 0 ma 4 8 ppm/v load regulation 2 g grade v o /v load v s = 5.0 v, 0 ma i out 30 ma 6 15 ppm/ma dropout voltage v s ? v o v s = 4.1 v, i load = 10 ma 0.80 v v s = 4.3 v, i load = 30 ma 1.00 v long-term stability 3 dv o 1000 hours @ 125c 1.2 mv noise voltage e n 0.1 hz to 10 hz 33 v p-p 1 initial accuracy includes temperature hysteresis effect. 2 line and load regulation specificatio ns include the effect of self-heating. 3 long-term stability specification is nonc umulative. the drift in subsequent 1000-hour periods is significantly lower than in t he first 1000-hour period.
ref19x series rev. i | page 12 of 28 electrical characteristicsref196 @ ? 40c t a +85c @ v s = 3.5 v, C40c t a +85c, unless otherwise noted. table 18. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 g grade 3 tcv o /c i out = 0 ma 10 25 ppm/c line regulation 4 g grade v o /v in 3.5 v v s 15 v, i out = 0 ma 10 20 ppm/v load regulation 4 g grade v o /v load v s = 5.0 v, 0 ma i out 25 ma 10 20 ppm/ma dropout voltage v s ? v o v s = 4.1 v, i load = 10 ma 0.80 v v s = 4.3 v, i load = 25 ma 1.00 v sleep pin logic high input voltage v h 2.4 v logic high input current i h ?8 a logic low input voltage v l 0.8 v logic low input current i l ?8 a supply current no load 45 a sleep mode no load 15 a 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating. electrical characteristicsref196 @ ? 40c t a +125c @ v s = 3.50 v, ?40c t a +125c, unless otherwise noted. table 19. parameter mnemonic condition min typ max unit temperature coefficient 1, 2 g grade 3 tcv o /c i out = 0 ma 10 ppm/c line regulation 4 g grade v o /v in 3.50 v v s 15 v, i out = 0 ma 20 ppm/v load regulation 4 g grade v o /v load v s = 5.0 v, 0 ma i out 20 ma 20 ppm/ma dropout voltage v s ? v o v s = 4.1 v, i load = 10 ma 0.80 v v s = 4.4 v, i load = 20 ma 1.10 v 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating.
ref19x series rev. i | page 13 of 28 electrical characteristicsref198 @ t a = 25c @ v s = 5.0 v, t a = 25c, unless otherwise noted. table 20. parameter mnemonic condition min typ max unit initial accuracy 1 e grade v o i out = 0 ma 4.094 4.096 4.098 v f grade 4.091 4.101 v g grade 4.086 4.106 v line regulation 2 e grade v o /v in 4.5 v v s 15 v, i out = 0 ma 2 4 ppm/v f and g grades 4 8 ppm/v load regulation 2 e grade v o /v load v s = 5.4 v, 0 ma i out 30 ma 2 4 ppm/ma f and g grades 4 8 ppm/ma dropout voltage v s ? v o v s = 4.6 v, i load = 10 ma 0.502 v v s = 5.4 v, i load = 30 ma 1.30 v long-term stability 3 dv o 1000 hours @ 125c 1.2 mv noise voltage e n 0.1 hz to 10 hz 40 v p-p 1 initial accuracy includes temperature hysteresis effect. 2 line and load regulation specificatio ns include the effect of self-heating. 3 long-term stability specification is nonc umulative. the drift in subsequent 1000-hour periods is significantly lower than in t he first 1000-hour period. electrical characteristicsref198 @ ? 40c t a +85c @ v s = 5.0 v, ?40c t a +85c, unless otherwise noted. table 21. parameter mnemonic condition min typ max unit temperature coefficient 1 , 2 e grade tcv o /c i out = 0 ma 2 5 ppm/c f grade 5 10 ppm/c g grade 3 10 25 ppm/c line regulation 4 e grade v o /v in 4.5 v v s 15 v, i out = 0 ma 5 10 ppm/v f and g grades 10 20 ppm/v load regulation 4 e grade v o /v load v s = 5.4 v, 0 ma i out 25 ma 5 10 ppm/ma f and g grades 10 20 ppm/ma dropout voltage v s ? v o v s = 4.6 v, i load = 10 ma 0.502 v v s = 5.4 v, i load = 25 ma 1.30 v sleep pin logic high input voltage v h 2.4 v logic high input current i h ?8 a logic low input voltage v l 0.8 v logic low input current i l ?8 a supply current no load 45 a sleep mode no load 15 a 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating.
ref19x series rev. i | page 14 of 28 electrical characteristicsref198 @ ?40c t a + 125c @ v s = 5.0 v, ?40c t a +125c, unless otherwise noted. table 22. parameter mnemonic condition min typ max unit temperature coefficient 1, 2 e grade tcv o /c i out = 0 ma 2 ppm/c f grade 5 ppm/c g grade 3 10 ppm/c line regulation 4 e grade v o /v in 4.5 v v s 15 v, i out = 0 ma 5 ppm/v f and g grades 10 ppm/v load regulation 4 e grade v o /v load v s = 5.6 v, 0 ma i out 20 ma 5 ppm/ma f and g grades 10 ppm/ma dropout voltage v s ? v o v s = 4.7 v, i load = 10 ma 0.60 v v s = 5.6 v, i load = 20 ma 1.50 v 1 for proper operation, a 1 f capacitor is required between the output pin and the gnd pin of the device. 2 tcv o is defined as the ratio of output change with temperature va riation to the specif ied temperature range expressed in ppm/c. tcv o = (v max ? v min )/v o (t max ? t min ) 3 guaranteed by characterization. 4 line and load regulation specificatio ns include the effect of self-heating. wafer test limits for proper operation, a 1 f capacitor is required between the output pins and the gnd pin of the ref19x. electrical tests and wafer probe to the limits are shown in table 23 . due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dic e. consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. @ i load = 0 ma, t a = 25c, unless otherwise noted. table 23. parameter mnemonic condition limit unit initial accuracy ref191 v o 2.043/2.053 v ref192 2.495/2.505 v ref193 2.990/3.010 v ref194 4.495/4.505 v ref195 4.995/5.005 v ref196 3.290/3.310 v ref198 4.091/4.101 v line regulation v o /v in (v o + 0.5 v) < v in < 15 v, i out = 0 ma 15 ppm/v load regulation v o /i load 0 ma < i load < 30 ma, v in = (v o + 1.3 v) 15 ppm/ma dropout voltage v o ? v+ i load = 10 ma 1.25 v i load = 30 ma 1.55 v sleep mode input logic input high v ih 2.4 v logic input low v il 0.8 v supply current v in = 15 v no load 45 a sleep mode no load 15 a
ref19x series rev. i | page 15 of 28 absolute maximum ratings table 24. parameter 1 rating supply voltage ?0.3 v, +18 v output to gnd ?0.3 v, v s + 0.3 v output to gnd short-circuit duration indefinite storage temperature range pdip, soic_n package ?65c to +150c operating temperature range ref19x ?40c to +85c junction temperature range pdip, soic_n package ?65c to +150c lead temperature range (soldering 60 sec) 300c 1 absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 25. thermal resistance package type ja 1 jc unit 8-lead pdip 103 43 c/w 8-lead soic_n 158 43 c/w 1 ja is specified for worst-case conditions; that is, ja is specified for the device in socket for pdip and is specified for the device soldered in the circuit board for the soic package. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
ref19x series rev. i | page 16 of 28 typical performance characteristics temperature (c) 100 ?50 ?25 0 25 50 75 output voltage (v) 5.004 5.003 5.001 5.002 5.000 4.999 4.998 4.997 4.996 3 typical parts 5.15v < v in < 15v 00371-003 figure 3. ref195 output voltage vs. temperature i load (ma) 30 0 5 10 15 20 25 load regul a tion (ppm/v) 32 24 28 20 16 12 4 8 0 ?40c +25c 5.15v v s 15v +85c 00371-004 figure 4. ref195 load regulator vs. i load v in (v) 16 46 8 101214 line regul a tion (ppm/ma) 20 16 12 8 4 0 +85c +25c ?40c 0ma i out 25ma 00371-005 figure 5. ref195 line regulator vs. v in t c ?v out (ppm/c) 20 20 10 15 0 51 0 1 5 5 percentage of parts 50 45 40 30 35 20 25 10 5 15 0 based on 600 units, 4 runs ?40c t a +85c 00371-006 figure 6. t c v out distribution temperature (c) 100 ?50 ?25 0 25 50 75 supply current (a) 40 35 30 25 20 15 10 5 0 normal mode sleep mode 00371-007 figure 7. supply current vs. temperature temperature (c) 100 ?50 ?25 0 25 50 75 sleep pin current (a) ? 6 ?5 ?4 ?3 ?1 ?2 0 v l v h 00371-008 figure 8. sleep pin current vs. temperature
ref19x series rev. i | page 17 of 28 frequency (hz) 1m 10 100 1k 10k 100k ripple rejection (db) ?20 0 ?60 ?40 ?80 ?120 ?100 00371-009 figure 9. ripple rejection vs. frequency ref19x 1k? ref 10 f output 1k? 10f 1f 10f 2 6 4 00371-010 v in = 15v figure 10. ripple rejection vs. frequency measurement circuit frequency (hz) 10m 10 100 10k 1k 100k 1m z o ( ? ) 4 3 2 1 0 v g = 2v p-p v s = 4v v in = 7v 200v 1f 1f ref19x 2 6 4 z 00371-011 figure 11. output im pedance vs. frequency o ff on 100s 20mv 5v 10% 0% 90% 100% 00371-012 figure 12. load transient response v in = 15v 0 10ma 1f ref19x 4 2 6 00371-013 figure 13. load transient response measurement circuit 2v 2v 1ma load 30ma load 100s 10% 100% 0% 90% 00371-014 figure 14. power-on response time v in = 7v 1f ref19x 4 2 6 00371-015 figure 15. power-on response time measurement circuit 1v 2ms 5v on off v out i l = 1ma i l = 10ma 10% 100% 0% 90% 00371-016 figure 16. sleep response time v out v in = 15v 1f ref19x 3 2 6 4 0 0371-017 figure 17. sleep response time measurement circuit
ref19x series rev. i | page 18 of 28 5v 200mv 200s 10% 100% 0% 90% 00371-018 figure 18. line transient response ref195 dropout voltage (v) 0.9 00 . 2 0.1 0.4 0.5 0.3 0.6 0.7 0.8 load current (ma) 35 30 25 15 20 5 10 0 00371-019 figure 19. load current vs. dropout voltage
ref19x series rev. i | page 19 of 28 applications output short-circuit behavior the ref19x family of devices is completely protected from damage due to accidental output shorts to gnd or to v + . in the event of an accidental short-circuit condition, the reference device shuts down and limits its supply current to 40 ma. v + v out sleep (shutdown) gnd 0 0371-020 figure 20. simpli fied schematic device power dissipation considerations the ref19x family of references is capable of delivering load currents to 30 ma with an input voltage that ranges from 3.3 v to 5 v. when these devices are used in applications with large input voltages, exercise care to avoid exceeding the maximum internal power dissipation of these devices. exceeding the published specifications for maximum power dissipation or junction temperature can result in premature device failure. the following formula should be used to calculate a devices maximum junction temperature or dissipation: ja a j d tt p ? = in this equation, t j and t a are the junction and ambient temperatures, respectively; p d is the device power dissipation; and ja is the device package thermal resistance. output voltage bypassing for stable operation, low dropout voltage regulators and references generally require a bypass capacitor connected from their v out pins to their gnd pins. although the ref19x family of references is capable of stable operation with capacitive loads exceeding 100 f, a 1 f capacitor is sufficient to guarantee rated performance. the addition of a 0.1 f ceramic capacitor in parallel with the bypass capacitor improves load current transient performance. for best line voltage transient performance, it is recommended that the voltage inputs of these devices be bypassed with a 10 f electrolytic capacitor in parallel with a 0.1 f ceramic capacitor. sleep mode operation all ref19x devices include a sleep capability that is ttl/cmos-level compatible. internally, a pull-up current source to v in is connected at the sleep pin. this permits the sleep pin to be driven from an open collector/drain driver. a logic low or a 0 v condition on the sleep pin is required to turn off the output stage. during sleep, the output of the references becomes a high impedance state where its potential would then be determined by external circuitry. if the sleep feature is not used, it is recommended that the sleep pin be connected to v in (pin 2). basic voltage reference connections the circuit in figure 21 illustrates the basic configuration for the ref19x family of references. note the 10 f/0.1 f bypass network on the input and the 1 f/0.1 f bypass network on the output. it is recommended that no connections be made to pin 1, pin 5, pin 7, and pin 8. if the sleep feature is not required, pin 3 should be connected to v in . nc nc v in sleep nc nc output 0.1f 10f ref19x nc = no connect 8 7 6 5 1 2 3 4 1f tant 0.1f + 00371-021 figure 21. basic voltage reference configuration membrane switch-controlled power supply with output load currents in the tens of ma, the ref19x family of references can operate as a low dropout power supply in hand-held instrument applications. in the circuit shown in figure 22, a membrane on/off switch is used to control the operation of the reference. during an initial power-on condition, the sleep pin is held to gnd by the 10 k resistor. recall that this condition (read: three-state) disables the ref19x output. when the membrane on switch is pressed, the sleep pin is momentarily pulled to v in , enabling the ref19x output. at this point, current through the 10 k resistor is reduced, and the internal current source connected to the sleep pin takes control. pin 3 assumes and remains at the same potential as v in . when the membrane off switch is pressed, the sleep pin is momentarily connected to gnd, which once again disables the ref19x output.
ref19x series rev. i | page 20 of 28 on off 10k ? 1k? 5% nc nc v in nc nc output ref19x nc = no connect 8 7 6 5 1 2 3 4 1f tant + 00371-022 figure 22. membrane switch-controlled power supply current-boosted references with current limiting while the 30 ma rated output current of the ref19x series is higher than is typical of other reference ics, it can be boosted to higher levels, if desired, with the addition of a simple external pnp transistor, as shown in figure 23. full-time current limiting is used to protect the pass transistor against shorts. u1 ref196 (see table) r4 2 ? r1 1k? r2 1.5k ? q2 2n3906 c2 100f 25v d1 r3 1.82k ? c1 10f/25v (tantalum) s f c3 0.1f f s r1 q1 tip32a (see text) + v s = 6 v to 9v (see text) v s common v c v out common output table u1 ref192 ref193 ref196 ref194 ref195 v out (v) 2.5 3.0 3.3 4.5 5.0 +v out 3.3v @ 150ma 2 6 + 1n4148 (see text on sleep) 3 + 4 00371-023 figure 23. boosted 3.3 v refere nced with current limiting in this circuit, the power supply current of reference u1 flowing through r1 to r2 develops a base drive for q1, whose collector provides the bulk of the output current. with a typical gain of 100 in q1 for 100 ma to 200 ma loads, u1 is never required to furnish more than a few ma, so this factor minimizes tempera- ture-related drift. short-circuit protection is provided by q2, which clamps the drive to q1 at about 300 ma of load current, with values as shown in figure 23. with this separation of control and power functions, dc stability is optimum, allowing most advantageous use of premium grade ref19x devices for u1. of course, load management should still be exercised. a short, heavy, low dc resistance (dcr) conductor should be used from u1 to u6 to the v out sense point s, where the collector of q1 connects to the load, point f. because of the current limiting configuration, the dropout voltage circuit is raised about 1.1 v over that of the ref19x devices, due to the v be of q1 and the drop across current sense resistor r4. however, overall dropout is typically still low enough to allow operation of a 5 v to 3.3 v regulator/reference using the ref196 for u1 as noted, with a v s as low as 4.5 v and a load current of 150 ma. the requirement for a heat sink on q1 depends on the maximum input voltage and short-circuit current. with v s = 5 v and a 300 ma current limit, the worst-case dissipation of q1 is 1.5 w, less than the to-220 package 2 w limit. however, if smaller to-39 or to-5 packaged devices, such as the 2n4033, are used, the current limit should be reduced to keep maximum dissipation below the package rating. this is accomplished by simply raising r4. a tantalum output capacitor is used at c1 for its low equivalent series resistance (esr), and the higher value is required for stability. capacitor c2 provides input bypassing and can be an ordinary electrolytic. shutdown control of the booster stage is an option, and when used, some cautions are needed. due to the additional active devices in the v s line to u1, a direct drive to pin 3 does not work as with an unbuffered ref19x device. to enable shutdown control, the connection from u1 to u2 is broken at the x, and diode d1 then allows a cmos control source, v c , to drive u1 to u3 for on/off operation. startup from shutdown is not as clean under heavy load as it is in basic ref19x series, and can require several milliseconds under load. nevertheless, it is still effective and can fully control 150 ma loads. when shutdown control is used, heavy capacitive loads should be minimized. negative precision reference without precision resistors in many current-output cmos dac applications where the output signal voltage must be the same polarity as the reference voltage, it is often necessary to reconfigure a current-switching dac into a voltage-switching dac using a 1.25 v reference, an op amp, and a pair of resistors. using a current-switching dac directly requires an additional operational amplifier at the output to reinvert the signal. a negative voltage reference is then desirable, because an additional operational amplifier is not required for either reinversion (current-switching mode) or amplification (voltage-switching mode) of the dac output voltage. in general, any positive voltage reference can be converted into a negative voltage reference using an operational amplifier and a pair of matched resistors in an inverting configuration. the disadvantage to this approach is that the largest single source of error in the circuit is the relative matching of the resistors used. the circuit illustrated in figure 24 avoids the need for tightly matched resistors by using an active integrator circuit. in this circuit, the output of the voltage reference provides the input drive for the integrator. to maintain circuit equilibrium, the integrator adjusts its output to establish the proper relationship between the references v out and gnd. thus, any desired negative output voltage can be selected by substituting for the appropriate reference ic. the sleep feature is maintained in the circuit with the simple addition of a pnp transistor and a 10 k resistor.
ref19x series rev. i | page 21 of 28 one caveat to this approach is that although rail-to-rail output amplifiers work best in the application, these operational amplifiers require a finite amount (mv) of headroom when required to provide any load current. the choice for the circuits negative supply should take this issue into account. 100 ? 1f 1k ? 1f ?v ref ref19x v in gnd v out 100k ? sleep ttl/cmos a1 = 1/2 op295, 1/2 op291 v in 10k ? 2n3906 3 6 2 4 sleep 10k ? +5v ?5v a1 00371-024 figure 24. negative precision voltage reference uses no precision resistors stacking reference ics for arbitrary outputs some applications may require two reference voltage sources that are a combined sum of standard outputs. the circuit shown in figure 25 shows how this stacked output reference can be implemented. r1 3.9k ? (see text) c1 0.1f + vs v s > v out2 + 0.15v v in c ommon v out common output table u1/u2 ref192/ref192 ref192/ref194 ref192/ref195 v out1 (v) 2.5 2.5 2.5 v out2 (v) 5.0 7.0 7.5 +v out2 c2 1f c3 0.1f +v out1 c4 1f u2 ref19x (see table) 2 6 3 4 u1 ref19x (see table) 2 6 3 4 + + v o (u2) v o (u1) 00371-025 figure 25. stacking voltage references with the ref19x two reference ics are used, fed from a common unregulated input, v s . the outputs of the individual ics are connected in series, as shown in figure 25, which provide two output voltages, v out1 and v out2 . v out1 is the terminal voltage of u1, while v out2 is the sum of this voltage and the terminal voltage of u2. u1 and u2 are chosen for the two voltages that supply the required outputs (see output table in figure 25). if, for example, both u1 and u2 are ref192s, the two outputs are 2.5 v and 5.0 v. while this concept is simple, some cautions are needed. since the lower reference circuit must sink a small bias current from u2 (50 a to 100 a), plus the base current from the series pnp output transistor in u2, either the external load of u1 or r1 must provide a path for this current. if the u1 minimum load is not well defined, resistor r1 should be used, set to a value that conservatively passes 600 a of current with the applicable v out1 across it. note that the two u1 and u2 reference circuits are locally treated as macrocells, each having its own bypasses at input and output for best stability. both u1 and u2 in this circuit can source dc currents up to their full rating. the minimum input voltage, v s , is determined by the sum of the outputs, v out2 , plus the dropout voltage of u2. a related variation on stacking two 3-terminal references is shown in figure 26, where u1, a ref192, is stacked with a 2-terminal reference diode, such as the ad589. like the 3-terminal stacked reference above, this circuit provides two outputs, vout1 and vout2, which are the individual terminal voltages of d1 and u1, respectively. here this is 1.235 v and 2.5 v, which provides a v out2 of 3.735 v. when using 2-terminal reference diodes, such as d1, the rated minimum and maximum device currents must be observed, and the maximum load current from v out1 can be no greater than the current setup by r1 and v o (u1). when v o (u1) is equal to 2.5 v, r1 provides a 500 a bias to d1, so the maximum load current available at v out1 is 450 a or less. d1 ad589 r1 4.99k ? (see text) c1 0.1f + v s v s > v out2 + 0.15v v in common v out common +v out2 3.735v c2 1f +v out1 1.235v c3 1f u1 ref192 2 6 3 4 + + v o (u1) v o (d1) 00371-026 figure 26. stacking voltage references with the ref192 precision current source in low power applications, the need often arises for a precision current source that can operate on low supply voltages. as shown in figure 27, any one of the devices in the ref19x family of references can be configured as a precision current source. the circuit configuration illustrated is a floating current source with a grounded load. the output voltage of the reference is bootstrapped across r set , which sets the output current into the load. with this configuration, circuit precision is maintained for load currents in the range from the references supply current (typically 30 a) to approximately 30 ma. the low dropout voltage of these devices maximizes the current sources output voltage compliance without excess headroom.
ref19x series rev. i | page 22 of 28 i sy adjust r1 r set p1 r l i out e.g., ref195: v out = 5v i out = 5ma r1 = 953 ? p1 = 100 ? , 10-turn v in 1f ref19x 2 3 4 6 v in i out r l (max) + v sy (min) i out = v out + i sy (ref19x) r set v out >> i sy r set v in gnd v ref sleep 00371-027 figure 27. a low dropout, precision current source the governing equations for the circuit are 19x refminvmaxriv sy l out in , u 19x refi r v i sy set out out 19x refi r v sy set out switched output 5 v/3.3 v reference applications often require digital control of reference voltages, selecting between one stable voltage and a second. with the sleep feature inherent to the ref19x series, switched output reference configurations are easily implemented with little additional hardware. the circuit in figure 28 illustrates the general technique, which takes advantage of the output wire-or capability of the ref19x device family. when off, a ref19x device is effectively an open circuit at the output node with respect to the power supply. when on, a ref19x device can source current up to its current rating, but sink only a few a (essentially, just the relatively low current of the internal output scaling divider). consequently, when two devices are wired together at their common outputs, the output voltage is the same as the output voltage for the on device. the off state device draws a small standby current of 15 a (max), but otherwise does not interfere with operation of the on device, which can operate to its full current rating. note that the two devices in the circuit conveniently share both input and output capacitors, and with cmos logic drive, it is power efficient. u3b 74hc04 u3a 74hc04 v c v out (v) 5.0 3.3 4.5 5.0 v c * hi lo hi lo u1/u2 ref195/ ref196 ref194/ ref195 * cmos logic levels +v s = 6v v in common v out common c1 0.1f +v out c2 1f u1 ref19x (see table) 2 3 4 u2 ref19x (see table) 2 3 4 + 6 6 13 24 output t a ble 00371-028 figure 28. switched output reference using dissimilar ref19x series devices with this configuration allows logic selection between the u1/u2-specified terminal voltages. for example, with u1 (a ref195) and u2 (a ref196), as noted in the table in figure 28, changing the cmos- compatible v c logic control voltage from hi to lo selects between a nominal output of 5 v and 3.3 v, and vice versa. other ref19x family units can also be used for u1/u2, with similar operation in a logic sense, but with outputs as per the individual paired devices (see the table in figure 28). of course, the exact output voltage tolerance, drift, and overall quality of the reference voltage is consistent with the grade of individual u1 and u2 devices. due to the nature of the wire-or, one application caveat should be understood about this circuit. since u1 and u2 can only source current effectively, negative going output voltage changes, which require the sinking of current, necessarily takes longer than positive going changes. in practice, this means that the circuit is quite fast when undergoing a transition from 3.3 v to 5 v, but the transition from 5 v to 3.3 v takes longer. exactly how much longer is a function of the load resistance, r l , seen at the output and the typical 1 f value of c2. in general, a conservative transition time is approximately several milliseconds for load resistances in the range of 100 to 1 k. note that for highest accuracy at the new output voltage, several time constants should be allowed (>7.6 time constants for <1/2 lsb error @ 10 bits, for example). kelvin connections in many portable applications where the pc board cost and area go hand-in-hand, circuit interconnects are very often narrow. these narrow lines can cause large voltage drops if the voltage reference is required to provide load currents to various functions. the interconnections of a circuit can exhibit a typical line resistance of 0.45 m/square (1 oz. cu, for example).
ref19x series rev. i | page 23 of 28 in applications where these devices are configured as low dropout voltage regulators, these wiring voltage drops can become a large source of error. to circumvent this problem, force and sense connections can be made to the reference through the use of an operational amplifier, as shown in figure 29. this method provides a means by which the effects of wiring resistance voltage drops can be eliminated. load currents flowing through wiring resistance produce an i-r error (i load r wire ) at the load. however, the kelvin connection overcomes the problem by including the wiring resistance within the forcing loop of the op amp. because the op amp senses the load voltage, op amp loop control forces the output to compensate for the wiring error and to produce the correct voltage at the load. depending on the reference device chosen, operational amplifiers that can be used in this application are the op295, op292, and op183. 2 3 1 +v out sense +v out force r lw 1f 100k ? r l ref19x v in gnd v out a1 = 1/2 op295 1/2 op292 op183 v in 6 2 4 sleep v in r lw a1 3 00371-029 figure 29. a low dropout, kelvin-connected voltage reference fail-safe 5 v reference some critical applications require a reference voltage to be maintained at a constant voltage, even with a loss of primary power. the low standby power of the ref19x series and the switched output capability allow a fail-safe reference configuration to be implemented rather easily. this reference maintains a tight output voltage tolerance for either a primary power source (ac line derived) or a standby (battery derived) power source, automatically switching between the two as the power conditions change. the circuit in figure 30 illustrates this concept, which borrows from the switched output idea of figure 28, again using the ref19x device family output wire-or capability. in this case, since a constant 5 v reference voltage is desired for all conditions, two ref195 devices are used for u1 and u2, with their on/off switching controlled by the presence or absence of the primary dc supply source, v s . v bat is a 6 v battery backup source that supplies power to the load only when v s fails. for normal (v s present) power conditions, v bat sees only the 15 a (maximum) standby current drain of u1 in its off state. in operation, it is assumed that for all conditions, either u1 or u2 is on, and a 5 v reference output is available. with this voltage constant, a scaled down version is applied to the comparator ic u3, providing a fixed 0.5 v input to the negative input for all power conditions. the r1 to r2 divider provides a signal to the u3 positive input proportionally to v s , which switches u3 and u1/u2, dependent upon the absolute level of v s . in figure 30, op amp u3 is configured as a comparator with hysteresis, which provides clean, noise-free output switching. this hysteresis is important to eliminate rapid switching at the threshold due to v s ripple. furthermore, the device chosen is the ad820, a rail-to-rail output device. this device provides hi and lo output states within a few mv of v s , ground for accurate thresholds, and compatible drive for u2 for all v s conditions. r3 provides positive feedback for circuit hysteresis, changing the threshold at the positive input as a function of the output of u3. r5 100k ? r6 100? r3 10m ? u3 ad820 c4 0.1f r2 100k ? r1 1.1m ? q1 2n3904 + v bat v s , v bat common v out common c2 0.1f c1 0.1f 5.000v c3 1f u1 ref195 (see table) 2 3 4 u2 ref195 (see table) 2 3 4 + 6 6 +v s r4 900k ? 4 2 7 6 3 + ? 0 0371-030 figure 30. a fail-safe 5 v reference
ref19x series rev. i | page 24 of 28 for v s levels lower than the lower threshold, u3 output is low; thus, u2 and q1 are off while u1 is on. for v s levels higher than the upper threshold, the situation reverses, with u1 off and both u2 and q1 on. in the interest of battery power conservation, all of the comparison switching circuitry is powered from v s and is arranged so that when v s fails, the default output comes from u1. for the r1 to r3 values, as shown in figure 30, lower/upper v s switching thresholds are approximately 5.5 v and 6 v, respectively. these can be changed to suit other v s supplies, as can the ref19x devices used for u1 and u2, over a range of 2.5 v to5 v of output. u3 can operate down to a v s of 3.3 v, which is generally compatible with all ref19x family devices. low power, strain gage circuit as shown in figure 31, the ref19x family of references can be used in conjunction with low supply voltage operational amplifiers, such as the op492 or the op283, in a self-contained strain gage circuit in which the ref195 is used as the core. other references can be easily accommodated by changing circuit element values. the references play a dual role, first as the voltage regulator to provide the supply voltage requirements of the strain gage and the operational amplifiers, and second as a precision voltage reference for the current source used to stimulate the bridge. a distinct feature of the circuit is that it can be remotely controlled on or off by digital means via the sleep pin. 500? 0.1% 57k? 1% 0.1f 10k ? 1% 0.1f 1/4 op492 10f ref195 2.21k ? 20k? 1% 10k ? 1% 20k ? 1% 20k ? 1% 20k? 1% 0.01f 10f 100? output 2n2222 + 1f + 6 2 4 + ? 1 4 11 2 3 1/4 op492 + ? 7 5 6 1/4 op492 + ? 14 12 13 1/4 op492 + ? 8 10 9 10k ? 1% 00371-031 figure 31. a low power, strain gage circuit
ref19x series rev. i | page 25 of 28 outline dimensions compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 32. 8-lead plastic dual in-line package [pdip] (n-8) p-suffix dimensions shown in inches and (millimeters) 8 5 41 pin 1 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 0.20 0.09 8 0 6.40 bsc 4.50 4.40 4.30 3.10 3.00 2.90 coplanarit y 0.10 0.75 0.60 0.45 compliant to jedec standards mo-153-aa figure 33. 8-lead thin shrink small outline package [tssop] (ru-8) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 060506-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 34. 8-lead standard small outline package [soic_n] narrow body (r-8) s-suffix dimensions shown in millimeters and (inches)
ref19x series rev. i | page 26 of 28 ordering guide model temperature range package description package option minimum quantities/reel ref191es ?40c to +85c 8-lead soic_n s-suffix (r-8) REF191ES-REEL ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref191esz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref191esz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref191gp ?40c to +85c 8-lead pdip p-suffix (n-8) ref191gpz 1 ?40c to +85c 8-lead pdip p-suffix (n-8) ref191gs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref191gs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref191gsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref191gsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref192es ?40c to +85c 8-lead soic_n s-suffix (r-8) ref192es-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref192es-reel7 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref192esz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref192esz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref192esz-reel7 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref192fs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref192fs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref192fs-reel7 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref192fsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref192fsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref192fsz-reel7 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref192gp ?40c to +85c 8-lead pdip p-suffix (n-8) ref192gpz 1 ?40c to +85c 8-lead pdip p-suffix (n-8) ref192gru ?40c to +85c 8-lead tssop ru-8 ref192gru-reel7 ?40c to +85c 8-lead tssop ru-8 1000 ref192gruz 1 ?40c to +85c 8-lead tssop ru-8 ref192gruz-reel7 1 ?40c to +85c 8-lead tssop ru-8 1000 ref192gs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref192gs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref192gs-reel7 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref192gsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref192gsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref192gsz-reel7 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref193gs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref193gs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref193gsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref193gsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref194es ?40c to +85c 8-lead soic_n s-suffix (r-8) ref194es-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref194esz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref194esz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref194fs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref194fsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref194gp ?40c to +85c 8-lead pdip p-suffix (n-8) ref194gpz 1 ?40c to +85c 8-lead pdip p-suffix (n-8) ref194gs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref194gs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref194gs-reel7 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref194gsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref194gsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500
ref19x series rev. i | page 27 of 28 model temperature range package description package option minimum quantities/reel ref194gsz-reel7 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref195es ?40c to +85c 8-lead soic_n s-suffix (r-8) ref195es-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref195esz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref195esz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref195fs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref195fs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref195fsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref195fsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref195gp ?40c to +85c 8-lead pdip p-suffix (n-8) ref195gpz 1 ?40c to +85c 8-lead pdip p-suffix (n-8) ref195gru ?40c to +85c 8-lead tssop ru-8 ref195gru-reel7 ?40c to +85c 8-lead tssop ru-8 1000 ref195gruz 1 ?40c to +85c 8-lead tssop ru-8 ref195gruz-reel7 1 ?40c to +85c 8-lead tssop ru-8 1000 ref195gs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref195gs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref195gs-reel7 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref195gsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref195gsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref195gsz-reel7 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref196gru-reel7 ?40c to +85c 8-lead tssop ru-8 1000 ref196gruz-reel7 1 ?40c to +85c 8-lead tssop ru-8 1000 ref196gs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref196gs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref196gsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref196gsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref196gsz-reel7 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref198es ?40c to +85c 8-lead soic_n s-suffix (r-8) ref198es-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref198esz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref198esz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref198esz-reel7 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 1000 ref198fs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref198fs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref198fsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref198fsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref198gp ?40c to +85c 8-lead pdip p-suffix (n-8) ref198gpz 1 ?40c to +85c 8-lead pdip p-suffix (n-8) ref198gru ?40c to +85c 8-lead tssop ru-8 ref198gru-reel7 ?40c to +85c 8-lead tssop ru-8 1000 ref198gruz 1 ?40c to +85c 8-lead tssop ru-8 ref198gruz-reel7 1 ?40c to +85c 8-lead tssop ru-8 2500 ref198gs ?40c to +85c 8-lead soic_n s-suffix (r-8) ref198gs-reel ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 ref198gsz 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) ref198gsz-reel 1 ?40c to +85c 8-lead soic_n s-suffix (r-8) 2500 1 z = pb-free part.
ref19x series rev. i | page 28 of 28 notes ?2006 analog devices, inc. all ri ghts reserved. trademarks and registered trademarks are the prop erty of their respective owners c00371-0-10/06(i)

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